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AKM 公司的AK7782是集成24位5路ADC和SRC的雙路音頻信號(hào)處理器(DSP),同時(shí)還集成了8:2立體聲輸入選擇器,取樣速率轉(zhuǎn)換器,速率高達(dá)96kHz,ADC取樣頻率從7.35kHz 到96kHz.本文介紹了AK7782主要特性,方框圖,DSP方框圖,AK7782評(píng)估板AKD7782-A主要功能,方框圖,電路圖以及元件布局圖. The AK7782 is an audio digital signal processor with integrated 24bit 5ch ADCs, an 8:2 stereo input selector and sample rate converters that support 2ch inputs and the frequency up to 96kHz. The ADC supports wide range of sampling frequency from 7.35kHz to 96kHz. Two integrated audio DSPs have high performance processing speed of 2560step/fs (at 48kHz sampling), and two 6k-word delay RAMs allow surround processing, time alignment adjusting and FIR filtering. As the AK7782 is a RAM based DSP, it is programmable for various user requirements. It is housed in a 100pin LQFP package. AK7782主要特性: [DSP1/DSP2] □ Word Length: 28-bits □ Instruction Cycle Time: 8.1ns (2560fs, fs=48kHz) □ Processing Step: 2560 steps (max) /fs= 48kHz, 44.1kHz (Normal Speed) 15360 steps (max) /fs= 8kHz, 7.35kHz 1280 steps (max) fs= 96kHz, 88.2kHz (Double Speed) □ Multiplier: 24 x 16 → 40-bits (double precision available) □ Divider: 24 ÷ 24 → 24-bits (floating point normalization function) □ ALU: 44-bit arithmetic operation (with 4-bit overflow margin) 24-bit arithmetic and logic operation □ Data Shift: Right shift after multiplication 1, 2, 4, 5, 8, 14, 15-bits Right shift BUS 1, 2, 3, 4, 8, 14, 15-bits Left shift after multiplication 1, 2, 3, 4, 8, 15-bits Left shift BUS 1, 2, 3, 4, 6, 8, 15-bits Indirect shifting function □ Program RAM (PRAM): 2048word x 36-bits □ Coefficient RAM (CRAM): 2048word x 16-bits □ Data RAM (DRAM): 2048word x 28-bits □ Offset Register (OFREG): 64word x 13-bits □ Delay RAM (DLRAM): 168kbit (four types) ● 6kword 28-bits ● 4kword 28-bits + 4kword 14-bits ● 3kword 28-bits + 6kword 14-bits ● 3kword 28-bits + 3kword 28-bits (Linear) □ Register: 44-bits x 4 (ACC) [for ALU] 28-bits x 12 (TMP) [DBUS connection] 28-bits x 6 steps stack (PTMP) [DBUS connection] [Stereo ADC, Common for ADC1 and ADC2] □ 24-bit 2ch x 2 □ S/(N+D): 90dB (fs=48kHz) □ D-range: 96dBA (fs=48kHz) □ S/N: 96dBA (fs=48kHz) □ 8ch bidirectional analog input selector □ High-pass filter (HPF) for DC offset cancellation □ fs=7.35kHz ~ 96kHz[Mono ADC] □ 24bit 1ch □ S/(N+D) 88dB (fs=48kHz) □ D-range 95dBA (fs=48kHz) □ S/N 95dBA (fs=48kHz) □ High-pass filter (HPF) for DC offset cancellation □ fs=7.35kHz ~ 96kHz □ Digital volume control[DSP1/DSP2 In/Output Digital Interface] □ Serial Data Input: 14ch (including ADC block) □ Serial Data Output: 16ch (each DSP outputs are 14ch) □ Microcomputer Interface: 1ch In/Out or I2C-bus[SRC, Common for SRC1 and SRC2] □ 2ch x 2 □ fs=7.35kHz ~ 96kHz [General] □ PLL □ 3.3V±0.3V, 1.8V ±0.1V □ Operational Temperature: -40℃ ~ 85℃ □ 100pin LQFP 
圖1.AK7782方框
圖2.AK7782 DSP方框圖 ( DSP1 和DSP2) AK7782評(píng)估板AKD7782-A The AKD7782-A is an evaluation board for AK7782, which is a highly integrated audio processor including 5ch 24bit ADC, 4ch SRC and two audio DSP cores. This board is composed of a main board and a sub board. It is possible to control the setting of board via USB port. RCA connectors are used for the input and output of analog signal. This board also has digital interface and can achieve the interface with digital audio system via optical connector. 評(píng)估板AKD7782-A功能: Read/Write access to PRAM, CRAM, OFREG and control registers of AK7782 Compatible with 2 types of digital audio interface - Optical input (x1) / Optical output (x1) - 10pin header for interface with external data source (x2) ADC1/ADC2 18ch input, ADCM 1ch input, DAC 8ch output(Note: There is no DAC within AK7782. 8ch DAC AK4359 is equipped.) USB port for board control
圖3.AKD7782-A 方框圖
圖4.AKD7782-A 評(píng)估板方框圖
圖5.AKD7782-A 評(píng)估板電路圖(1)
圖6.AKD7782-A 評(píng)估板電路圖(2)
圖7.AKD7782-A 評(píng)估板電路圖(3)
圖8.AKD7782-A 評(píng)估板電路圖(4)
圖9.AKD7782-A 評(píng)估板電路圖(5)
圖10.AKD7782-A 評(píng)估板電路圖(6)
圖11.AKD7782-A 評(píng)估板電路圖(7)
圖12.AKD7782-A 評(píng)估板電路圖(8)
圖13.AKD7782-A 評(píng)估板電路圖(9)
圖14.AKD7782-A 評(píng)估板電路圖(10)
圖15.AKD7782-A 評(píng)估板元件布局圖 詳情請(qǐng)見: 
ak7782_f00_pbe[1].pdf
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akd7782-a0-00e[1].pdf
(2.41 MB)
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