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【獵頭職位：北京需要一位“Analog Layout Engineer”】關(guān)鍵詞：Analog Layout Engineer ，聯(lián)系人：Sam Chen，郵箱sam-chen@kthr.com，QQ:648587455，微信也可查詢職位啦！打開手機(jī)微信，搜號(hào)碼“KTHR_COM”或查找微信公眾帳號(hào)“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ Description 1. The candidate should be having 3-5 years of experience in full customer Layout design of Analog and IO circuits in recent technology nodes. Preference would be given to 40nm/28nm experience. 2. The candidate is expected to have the required know how in usage of the layouts at full chip level 3. The candidate needs to have strong knowledge of layout concepts, limiting design rules and process know-how 4. Candidate has ASIC APR flow (RTL-GDS) experience will be highly preferred. 5. The candidate needs to have good communication skills to communicate/escalate the issues and get them resolved through support teams. 6.BE/ME in electrical/electronic engineering stream with 3-5 years of experience in Layout design of Analog and IO circuits in recent technology nodes 
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